CS 401 Computer Architectures
Spring 2016
Computer Science
Sabanci University
Announcements
- February 1:
Days, time, and room: Tuesday - 09:40-11:30 – FENS L065, Thursday 15:40-16:30
– FASS G022
- February 1:
See the Syllabus and Schedule
- February 1:
No lab this week.
- February 1:
From now on the announcements will be available through sucourse.
Textbook
John L. Hennessy & David A. Patterson. Computer
Organization and Design: The Hardware/Software Interface, 5th
Edition, Morgan Kaufmann Publishers, 2014. ISBN: 978-0-12-407726-3.
Recommended Resources
- Andrew S. Tannenbaum
and Todd Austin. Structured
Computer Organization, 6th Edition, Prentice Hall, 2012, ISBN:
978-0-13-291652-3.
- William Stallings. Computer
Organization & Architecture: Designing for Performance, 8th
Edition, Prentice Hall, 2009. ISBN: 978-0-13-607373-4.
- M. Morris Mano and
Charles R. Kime. Logic and
Computer Design Principles. 4th Edition, Prentice Hall, 2008, ISBN:
978-0-13-198926-9.
Time & Place
- Lecture: Tuesday 09:40 – 11:30, FENS
L065
- Lecture: Thursday
15:40-16:30 – FASS G022
- Lab/Recitation:
Friday 12:40 – 13:30,
FASS G056
Office
Hours
Friday 09:40 – 11:30,
FENS 1098 (Office Hours)
Teaching
Assistant
Atıl Utku Ay: FENS 2014
(time and place to be announced)
Motivation
This is an introductory course
on the architecture and organization of computer hardware. The most important
objective of the course is to explore the interaction between the hardware
organization of modern computers and software, and to reveal the impact of
the hardware organization on the performance of the software. Thus, the
emphasis in this course will be the basic concepts and techniques that are
fundamental for modern computers such as datapath design, pipelining,
memory hierarchy etc. MIPS architecture as a representative
modern RISC architecture is chosen to explain some fundamental concepts. And
also basics of assembly language programming for this architecture will be introduced.
More specifically, we show how numbers are represented within a computer and
how the circuits that perform arithmetic operations on those numerals are
organized. With a high-level overview of digital logic design to support us,
we look at how the datapath and control circuits of processors are designed,
and in particular we gain some insight for the pipelined processor design,
which is the key organizational principle at work in most present-day
processors. We examine the use of memory hierarchy (cache memory and virtual
memory) to provide the illusion of a large and fast memory from the
reality of limited fast memory plus a larger but slower memory. We'll look at
input/output devices and buses. Throughout the course there will be an
emphasis on the quantitative performance characteristics of computer systems;
we'll look at the influence of architecture and organization on performance,
and take an introductory look at the empirical and analytical tools
appropriate to the study of performance.
Topics
- Introduction:
Computer Abstractions, Technology, Terminology, and History.
- The Role of
Performance: Definition, Measurement and Metrics, Comparison
- Instructions:
Operations of the Computer Hardware, Operands, representation of the
Instructions, Procedures, and Addressing.
- Computer
Arithmetic: Signed and Unsigned Numbers, Addition and Subtraction,
Logical operations, ALU Construction, Multiplication, Division, Floating
Point Arithmetic.
- Datapath and
Control: Building the Datapath, Single-cycle and Multicycle
Implementations, Control Design and Microprogramming, Exception
Handling.
- Pipelining:
Pipelined datapath, Pipelined Control, Data hazards and Forwarding,
Pipeline Stalls, Branch Hazards, Exceptions, Superscalar and Dynamic
Pipelining.
- Memory Hierarchy:
Memory Hierarchy, The Basics of Cache, Measuring and Improving Cache
Performance, Virtual Memory.
- I/O: I/O Performance
Measures, Types and Characteristics of I/O Devices, Buses, and
Interfacing I/O Devices to the Memory, Processor, and Operating System.
- Multiprocessor
Systems: Multicore
processors, basics of multicore programming
Homework Assignments
Handwritten assignments are not acceptable
Course Materials
Course materials such as presentation slides and
handouts will be available through SUCourse
Tentative grading
- First Midterm: 30 %
- Final: 40 %
- HW Assignments: 15%
- Project: 10 %
- Participation &
Attendance: 5%
Important Dates
·
Midterm: 05 April 2016 (Tuesday) @ 09:40-11:30
·
Final: As scheduled by Student Office
Homework and Class Projects
Homework
assignments and class projects are important parts of the course. The
homework assignments involve Assembly language programming for MIPS
architectures. SPIM
simulator implements almost the entire MIPS assembler-extended instruction
set for the R2000/R3000 (It omits some of the complex floating point
comparisons and details of the memory system page tables.) The MIPS
architecture has evolved considerably since then (in particular, from 32 to
64 bits), which means that SPIM will not run programs compiled for recent
MIPS or SGI processors. The students are required to learn SPIM to develop
assembly codes for these architectures. Other types of homework assignments
such as cache simulation can also be given.
Class
projects will involve writing programs that simulate the datapath of MIPS or
a similar architecture which implements a selected subset of the instruction
set. The instructor may ask you to implement some exotic instructionz
that are not available in the original architecture.
Resources and Pointers
Dr. Erkay Savas
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