EL 310 Hardware Description Languages

Spring 2015



Instructor: Ilker Hamzaoglu
Office: MDBF 1037

Teaching Assitants: Ercan Kalalý
Office: MDBF 1042


Description: This course introduces modeling digital circuits using Hardware Description Languages (HDL). It then introduces Verilog HDL and covers behavioral modeling and verification of digital circuits using Verilog HDL. It then covers RTL modeling with Verilog and logic synthesis to standard cell libraries and FPGAs. In this course, students will also gain practical design experience by using Mentor Graphics Modelsim, Xilinx XST and Xilinx ISE CAD tools to design and implement several digital circuits.









Reference Books



Reference Materials



Lecture Notes (Accessible only from Sabanci University Intranet)






Lab Assignments 


Spring 2005


 Spring 2004