Ilker Hamzaoglu

EL 310 Hardware Description Languages

Spring 2009

Instructor: Ilker Hamzaoglu
Office: MDBF 1037

Teaching Assitants: Mert Cetin, Aydın Aysu, Abdulkadir Akın
Office: MDBF 1042, MDBF 1034

Description: This course introduces modeling digital circuits using Hardware Description Languages (HDL). It then introduces Verilog HDL and covers behavioral modeling and verification of digital circuits using Verilog HDL. It then covers RTL modeling with Verilog and logic synthesis to standard cell libraries and FPGAs. In this course, students will also gain practical design experience by using Mentor Graphics Modelsim, Xilinx XST and Xilinx ISE CAD tools to design and implement several digital circuits.

Course_Info_Spring2009

Textbooks

A Verilog HDL Primer, Jayaram Bhasker, Star Galaxy Publishing, Second Edition, 1999
Verilog HDL Synthesis: A Practical Primer, Jayaram Bhasker, Star Galaxy Publishing, 1998

Reference Books

HDL Chip Design: A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog, Douglas J. Smith, Doone Publications, 1998
Verilog HDL: A Guide to Digital Design and Synthesis, Samir Palnitkar, Prentice Hall, Second Edition, 2003
Real World FPGA Design with Verilog, Ken Coffman, Prentice Hall, 2000
Logic and Computer Design Fundamentals, Morris Mano and Charles Kime, Prentice Hall, Third Edition, 2004

Reference Materials

Lecture Notes (Accessible only from Sabanci University Intranet)

Exams

Lab Assignments

Spring 2005

Labs_1_2 (RGB to YCbCr Color Domain Converter Design)
Lab3 (Serial Bus Controller Design)
Lab4 (Unsigned Divider Design and Mapping to Spartan-3 FPGA Board)
Lab5 (H.264 CAVLC Design and Synthesis to UMC 0.18µ Cell Library)

Spring 2004