Schedule: CS 303 Logic and Digital System Design - Fall 2015

Week 

Dates

Subjects

Weekly Activity

1

14/09

Introduction and Binary Systems

No recitation or lab

2

21/09

Binary Systems and Boolean Algebra

No recitation or lab (Holiday)

3

28/09

Boolean Algebra

Gate Level Minimization

Recitation 1: breadboard, osciloscope and other lab equip.

4

05/10

Gate Level Minimization

Recitation 2: Xilinx installation

Lab 1: Design on breadboard

5

12/10

Combinational Logic

Lab 2: Design with FPGA

6

19/10

Combinational Logic

7

26/10

Combinational Logic

 

8

02/11

Synchronous Sequential Logic

9

09/11

Synchronous Sequential Logic

 

10

16/11

Registers and Counters

11

23/11

Design with ASM Charts

12

30/11

Design with ASM Charts

 

13

07/12

Memory and Programmable Logic

14

14/12

Memory and Programmable Logic

 

Finals

This schedule is tentative. The instructor reserves the right to modify as necessary.